High-Level Synthesis for FPGA, Part 1-Combinational Circuits
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High-Level Synthesis for FPGA, Part 1-Combinational Circuits
Original price was: $69.99.$14.00Current price is: $14.00.
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High-Level Synthesis for FPGA, Part 1-Combinational Circuits
★★★★★
$69.99
in stock
Udemy.com
as of October 12, 2025 9:47 pm
Logic Design with Vitis-HLS
Created by:
Mohammad Hosseinbady
PhD
PhD
Rating:4.56 (457reviews)
3295students enrolled
What Will I Learn?
- Designing combinational logic circuits with C/C++ language using the HLS approach
- Understanding the basic concepts of High-Level Synthesis (HLS)
- Using HLS concepts for designing combinational logic circuits
- HLS design flow for FPGAs
- Working with Xilinx Vitis-HLS and Vivado suite Toolsets
- How to generate RTL hardware IPs using Vitis-HLS
- Writing C-testbench in HLS
- Implementing two exciting projects with HLS
Requirements
- Understanding the basic concepts of C/C++ coding
- Understanding the basic concepts of logic operators (e.g., AND, OR, XOR, SHIFT )
- BASYS3 evaluation board
- Xilinx Vitis-HLS and Vivado (download Vivado ML Edition, or Vivado Design Suite - HLx Editions for Windows or Linux)
Target audience
- Hardware engineers
- Software engineers who are interested in FPGAs
- Lecturers, researchers, professors who want to use FPGA-based HLS in lectures, courses or research
- Digital Logic enthusiasts
High-Level Synthesis for FPGA, Part 1-Combinational Circuits Videos
![[Tutorial] Productive Parallel Programming for FPGA with High Level Synthesis](https://i.ytimg.com/vi/2UvUP2hxMyI/hqdefault.jpg)
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