Computer Organization: CPU Cache and the Memory Hierarchy

Master CPU cache organization & ace computer organization, computer architecture exams!

Created by: Aditya Mishra (Ph.D.)
Founding Director at Wisdom Academy, Educator, Researcher

What Will I Learn?

• Why do our computers have so many different types of memories?
• What is a cache?
• Why is a cache needed?
• What data should be kept in a cache?
• What are temporal and spatial locality?
• How do caches exploit temporal locality?
• How do caches exploit spatial locality?
• What is the classic LRU cache replacement policy?
• What are cache blocks? Why use them?
• What is associativity in caches?
• What is a fully associative cache?
• What is a direct mapped cache?
• What is a set associative cache?
• How to determine whether a particular memory address will hit or miss in the cache?
• How the address breakdown works for accessing data stored in fully associative, direct mapped, and set-associative caches?
• How to modify data in caches?
• What is a write-through cache?
• What is a write-back cache?
• How dirty bits are used in a write-back cache?
• What other cache eviction algorithms, besides LRU, can be used?
• How are caches organized in a hierarchy in modern computers?

Requirements

• No previous knowledge about caches or memory hierarchy needed. Everything you need to know about the topics will be covered.

Target audience

• Anyone interested in learning about caches in modern computers could benefit from this course.
• Computer science undergraduate students taking a computer organization or computer architecture course could benefit from the course.
• You may (optionally) wish to print some of the material